
; RISC OS / ARM assembler routines for LAME
; (C) 2000 Stefan Bellon.

 AREA CODE, READONLY
 align
 export |SetFiletype|

|SetFiletype|
 mov r2, r1
 mov r1, r0
 mov r0, #0x12
 swi 0x20008
 addvs r0, r0, #4
 mov r15, r14


 export |DisableFPETraps|
|DisableFPETraps|
 rfs r1
 bic r1, r1, r0
  ; bits in r0 have the following meaning:
  ; 16 - disable invalid operation trap
  ; 17 - disable divide by zero trap
  ; 18 - disable overflow trap
  ; 19 - disable underflow trap
  ; 20 - disable inexact trap
 wfs r1
 mov r15, r14


 export |WimpSlotSize|
|WimpSlotSize|
 adr r0, wimpslotcli
 swi 5+(1<<17)
 addvs r0, r0, #4
 mov r15, r14

wimpslotcli
 dcb "Wimpslot 1800K"
 dcb 0

END
