; Generated by gcc 2.95.2 19991024 (release) for ARM/RISC OS
__r0	RN	0
__a1	RN	0
__a2	RN	1
__a3	RN	2
__a4	RN	3
__v1	RN	4
__v2	RN	5
__v3	RN	6
__v4	RN	7
__v5	RN	8
__v6	RN	9
__sl	RN	10
__fp	RN	11
__ip	RN	12
__sp	RN	13
__lr	RN	14
__pc	RN	15
__f0	FN	0
__f1	FN	1
__f2	FN	2
__f3	FN	3
__f4	FN	4
__f5	FN	5
__f6	FN	6
__f7	FN	7
	AREA |C$$code1|, CODE, READONLY
|gcc2_compiled.|
	ALIGN
|dct64_1|
	KEEP |dct64_1|
	; args = 4, pretend = 0, frame = 868, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__v1, __v2, __v3, __v4, __v5, __v6, __fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	sub	__ip, __sp, #868
	cmp	__ip, __sl
	bllt	|__rt_stkovf_split_big|
	sub	__sp, __sp, #868
	str	__a1, [__sp, #0]
	ldr	__v1, [__fp, #4]
	str	__a2, [__sp, #4]
	ldr	__v2, |L..4|
	mov	__v6, __a3
	ldmia	__v1, {__a1-__a2}
	add	__a3, __v1, #248
	str	__a3, [__sp, #12]
	mov	__v5, __a4
	ldmia	__a3, {__a3-__a4}
	ldr	__v2, [__v2, #0]
	str	__v2, [__sp, #8]
	bl	|__adddf3|
	stmia	__v6, {__a1-__a2}
	ldr	__v3, [__sp, #12]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v2, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v6, #248
	str	__ip, [__sp, #16]
	stmia	__ip, {__a1-__a2}
	add	__lr, __v1, #8
	str	__lr, [__sp, #24]
	ldmia	__lr, {__a1-__a2}
	add	__a3, __v1, #240
	str	__a3, [__sp, #28]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	add	__a4, __v6, #8
	str	__a4, [__sp, #20]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #24]
	ldr	__v3, [__sp, #28]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #8
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #240
	str	__a3, [__sp, #32]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #16
	str	__a4, [__sp, #40]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #232
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #16
	str	__v3, [__sp, #36]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #40]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #16
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #232
	str	__a3, [__sp, #48]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #24
	str	__a4, [__sp, #56]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #224
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #24
	str	__v3, [__sp, #52]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #56]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #24
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #224
	str	__a3, [__sp, #64]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #32
	str	__a4, [__sp, #72]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #216
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #32
	str	__v3, [__sp, #68]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #72]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #32
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #216
	str	__a3, [__sp, #80]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #40
	str	__a4, [__sp, #88]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #208
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #40
	str	__v3, [__sp, #84]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #88]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #40
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #208
	str	__a3, [__sp, #96]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #48
	str	__a4, [__sp, #104]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #200
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #48
	str	__v3, [__sp, #100]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #104]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #48
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #200
	str	__a3, [__sp, #112]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #56
	str	__a4, [__sp, #120]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #192
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #56
	str	__v3, [__sp, #116]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #120]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #56
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #192
	str	__a3, [__sp, #128]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #64
	str	__a4, [__sp, #136]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #184
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #64
	str	__v3, [__sp, #132]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #136]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #64
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #184
	str	__a3, [__sp, #144]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #72
	str	__a4, [__sp, #152]
	ldmia	__a4, {__a1-__a2}
	b	|L..3|
|L..5|
	ALIGN
|L..4|
	DCD	|pnts|
|L..3|
	add	__v2, __v1, #176
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #72
	str	__v3, [__sp, #148]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #152]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #72
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #176
	str	__a3, [__sp, #160]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #80
	str	__a4, [__sp, #168]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #168
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #80
	str	__v3, [__sp, #164]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #168]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #80
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #168
	str	__a3, [__sp, #176]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #88
	str	__a4, [__sp, #184]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #160
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #88
	str	__v3, [__sp, #180]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #184]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #88
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #160
	str	__a3, [__sp, #192]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #96
	str	__a4, [__sp, #200]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #152
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #96
	str	__v3, [__sp, #196]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #200]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #96
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #152
	str	__a3, [__sp, #208]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #104
	str	__a4, [__sp, #216]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #144
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #104
	str	__v3, [__sp, #212]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #216]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #104
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #144
	str	__a3, [__sp, #224]
	stmia	__a3, {__a1-__a2}
	add	__a4, __v1, #112
	str	__a4, [__sp, #232]
	ldmia	__a4, {__a1-__a2}
	add	__v2, __v1, #136
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v6, #112
	str	__v3, [__sp, #228]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #232]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__ip, __lr, #112
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #136
	str	__a3, [__sp, #240]
	stmia	__a3, {__a1-__a2}
	mov	__v3, #120
	add	__a4, __v1, __v3
	str	__a4, [__sp, #248]
	ldmia	__a4, {__a1-__a2}
	add	__v1, __v1, #128
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__v2, __v6, __v3
	str	__v2, [__sp, #244]
	stmia	__v2, {__a1-__a2}
	ldr	__ip, [__sp, #248]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #8]
	add	__lr, __lr, __v3
	str	__lr, [__sp, #256]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #128
	str	__a3, [__sp, #252]
	stmia	__a3, {__a1-__a2}
	ldmia	__v6, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	ldr	__v2, |L..7|
	ldr	__v1, [__v2, #4]
	bl	|__adddf3|
	stmia	__v5, {__a1-__a2}
	ldr	__ip, [__sp, #244]
	ldmia	__v6, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__v3, __v5, __v3
	str	__v3, [__sp, #260]
	stmia	__v3, {__a1-__a2}
	ldr	__lr, [__sp, #20]
	ldr	__v2, [__sp, #228]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #8
	str	__v3, [__sp, #264]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #20]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #8
	str	__lr, [__sp, #272]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #112
	str	__a3, [__sp, #268]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #36]
	ldr	__v2, [__sp, #212]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #16
	str	__v3, [__sp, #276]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #36]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #16
	str	__lr, [__sp, #284]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #104
	str	__a3, [__sp, #280]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #52]
	ldr	__v2, [__sp, #196]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #24
	str	__v3, [__sp, #288]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #52]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #24
	str	__lr, [__sp, #296]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #96
	str	__a3, [__sp, #292]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #68]
	ldr	__v2, [__sp, #180]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #32
	str	__v3, [__sp, #300]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #68]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #32
	str	__lr, [__sp, #308]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #88
	str	__a3, [__sp, #304]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #84]
	ldr	__v2, [__sp, #164]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #40
	str	__v3, [__sp, #312]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #84]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #40
	str	__lr, [__sp, #320]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #80
	str	__a3, [__sp, #316]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #100]
	ldr	__v2, [__sp, #148]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #48
	str	__v3, [__sp, #324]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #100]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #48
	str	__lr, [__sp, #332]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #72
	str	__a3, [__sp, #328]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #116]
	ldr	__v2, [__sp, #132]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #56
	str	__v3, [__sp, #336]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #116]
	ldmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #56
	str	__lr, [__sp, #344]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v5, #64
	str	__a3, [__sp, #340]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #252]
	ldr	__v2, [__sp, #16]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #128
	str	__v3, [__sp, #348]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #252]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #248
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #240]
	ldr	__v1, [__sp, #32]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__v2, __v5, #136
	str	__v2, [__sp, #352]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #240]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #272]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #240
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #224]
	ldr	__v1, [__sp, #48]
	b	|L..6|
|L..8|
	ALIGN
|L..7|
	DCD	|pnts|
|L..6|
	ldmia	__lr, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v5, #144
	stmia	__ip, {__a1-__a2}
	ldr	__v2, [__sp, #224]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__v3, [__sp, #284]
	ldmia	__v3, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #232
	stmia	__ip, {__a1-__a2}
	ldr	__ip, [__sp, #208]
	ldr	__lr, [__sp, #64]
	ldmia	__ip, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v5, #152
	stmia	__ip, {__a1-__a2}
	ldr	__a3, [__sp, #64]
	ldr	__v1, [__sp, #208]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	ldr	__v2, [__sp, #296]
	ldmia	__v2, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #224
	stmia	__ip, {__a1-__a2}
	ldr	__v3, [__sp, #192]
	ldr	__ip, [__sp, #80]
	ldmia	__v3, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v5, #160
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #80]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldr	__v1, [__sp, #308]
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #216
	stmia	__ip, {__a1-__a2}
	ldr	__v2, [__sp, #176]
	ldr	__v3, [__sp, #96]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v5, #168
	stmia	__ip, {__a1-__a2}
	ldmia	__v3, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #320]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #208
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #160]
	ldr	__v1, [__sp, #112]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __v5, #176
	stmia	__v3, {__a1-__a2}
	ldr	__v2, [__sp, #160]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #332]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__ip, __v5, #200
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #144]
	ldr	__a3, [__sp, #128]
	str	__lr, [__sp, #360]
	ldmia	__lr, {__a1-__a2}
	str	__a3, [__sp, #364]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	add	__a4, __v5, #184
	str	__a4, [__sp, #356]
	stmia	__a4, {__a1-__a2}
	ldr	__v1, [__sp, #364]
	ldr	__v2, [__sp, #360]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #344]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__lr, __v5, #192
	str	__lr, [__sp, #368]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #336]
	ldr	__v2, |L..10|
	ldmia	__v5, {__a1-__a2}
	str	__a3, [__sp, #372]
	ldmia	__a3, {__a3-__a4}
	ldr	__v1, [__v2, #8]
	bl	|__adddf3|
	stmia	__v6, {__a1-__a2}
	ldr	__ip, [__sp, #372]
	ldmia	__v5, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #116]
	str	__lr, [__sp, #376]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #264]
	ldr	__a3, [__sp, #324]
	str	__a2, [__sp, #384]
	ldmia	__a2, {__a1-__a2}
	str	__a3, [__sp, #388]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a4, [__sp, #20]
	str	__a4, [__sp, #380]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #384]
	ldr	__ip, [__sp, #388]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	add	__v4, __v1, #8
	ldmia	__v4, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #100]
	str	__lr, [__sp, #392]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #276]
	ldr	__a3, [__sp, #312]
	str	__a2, [__sp, #400]
	ldmia	__a2, {__a1-__a2}
	str	__a3, [__sp, #404]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a4, [__sp, #36]
	str	__a4, [__sp, #396]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #400]
	ldr	__ip, [__sp, #404]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __v1, #16
	str	__lr, [__sp, #412]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	ldr	__a3, [__sp, #84]
	str	__a3, [__sp, #408]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #288]
	ldr	__v2, [__sp, #300]
	str	__a4, [__sp, #420]
	ldmia	__a4, {__a1-__a2}
	str	__v2, [__sp, #424]
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__ip, [__sp, #52]
	str	__ip, [__sp, #416]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #420]
	ldr	__v2, [__sp, #424]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __v1, #24
	str	__ip, [__sp, #432]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #68]
	str	__lr, [__sp, #428]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #340]
	ldr	__a3, [__sp, #260]
	str	__a2, [__sp, #440]
	ldmia	__a2, {__a1-__a2}
	str	__a3, [__sp, #444]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a4, [__sp, #132]
	str	__a4, [__sp, #436]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #444]
	ldr	__ip, [__sp, #440]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #244]
	str	__lr, [__sp, #448]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #328]
	ldr	__a3, [__sp, #268]
	str	__a2, [__sp, #456]
	ldmia	__a2, {__a1-__a2}
	str	__a3, [__sp, #460]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a4, [__sp, #148]
	str	__a4, [__sp, #452]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #460]
	ldr	__ip, [__sp, #456]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v4, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #228]
	str	__lr, [__sp, #464]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #316]
	ldr	__a3, [__sp, #280]
	str	__a2, [__sp, #472]
	ldmia	__a2, {__a1-__a2}
	str	__a3, [__sp, #476]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a4, [__sp, #164]
	str	__a4, [__sp, #468]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #476]
	ldr	__ip, [__sp, #472]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #412]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	ldr	__a3, [__sp, #212]
	str	__a3, [__sp, #480]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #304]
	ldr	__v2, [__sp, #292]
	str	__a4, [__sp, #488]
	ldmia	__a4, {__a1-__a2}
	str	__v2, [__sp, #492]
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__ip, [__sp, #180]
	str	__ip, [__sp, #484]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #492]
	ldr	__v2, [__sp, #488]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #432]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #196]
	str	__lr, [__sp, #496]
	stmia	__lr, {__a1-__a2}
	ldr	__a2, [__sp, #348]
	ldr	__v2, [__sp, #356]
	str	__a2, [__sp, #504]
	ldmia	__a2, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__ip, [__sp, #252]
	str	__ip, [__sp, #500]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #504]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	ldr	__a3, [__sp, #360]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #352]
	str	__a4, [__sp, #512]
	ldmia	__a4, {__a1-__a2}
	str	__v3, [__sp, #516]
	b	|L..9|
|L..11|
	ALIGN
|L..10|
	DCD	|pnts|
|L..9|
	ldmia	__v3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #240]
	str	__v2, [__sp, #508]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #512]
	ldr	__ip, [__sp, #516]
	ldmia	__v3, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v4, {__a3-__a4}
	bl	|__muldf3|
	mov	__a3, #176
	add	__a3, __v6, __a3
	str	__a3, [__sp, #520]
	stmia	__a3, {__a1-__a2}
	mov	__ip, #144
	add	__lr, __v5, __ip
	str	__lr, [__sp, #528]
	mov	__v3, #168
	ldmia	__lr, {__a1-__a2}
	add	__a3, __v5, __v3
	str	__a3, [__sp, #532]
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #524]
	bl	|__adddf3|
	ldr	__a4, [__sp, #524]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #528]
	ldr	__ip, [__sp, #532]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #412]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__v3, __v6, __v3
	str	__v3, [__sp, #536]
	stmia	__v3, {__a1-__a2}
	mov	__ip, #152
	add	__a2, __v5, __ip
	str	__a2, [__sp, #544]
	mov	__v3, #160
	ldmia	__a2, {__a1-__a2}
	add	__a3, __v5, __v3
	str	__a3, [__sp, #548]
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #540]
	bl	|__adddf3|
	ldr	__a4, [__sp, #540]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #544]
	ldr	__ip, [__sp, #548]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	ldr	__lr, [__sp, #432]
	ldmia	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__v3, __v6, __v3
	str	__v3, [__sp, #552]
	stmia	__v3, {__a1-__a2}
	ldr	__a3, [__sp, #368]
	mov	__v3, #248
	ldmia	__a3, {__a1-__a2}
	add	__a4, __v5, __v3
	str	__a4, [__sp, #556]
	ldmia	__a4, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #364]
	stmia	__v2, {__a1-__a2}
	ldr	__ip, [__sp, #556]
	ldr	__lr, [__sp, #368]
	ldmia	__ip, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__v3, __v6, __v3
	str	__v3, [__sp, #560]
	stmia	__v3, {__a1-__a2}
	mov	__ip, #200
	add	__a2, __v5, __ip
	str	__a2, [__sp, #568]
	mov	__v1, #240
	ldmia	__a2, {__a1-__a2}
	add	__a3, __v5, __v1
	str	__a3, [__sp, #572]
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #564]
	bl	|__adddf3|
	ldr	__a4, [__sp, #564]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #572]
	ldr	__v3, [__sp, #568]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldmia	__v4, {__a3-__a4}
	bl	|__muldf3|
	add	__v1, __v6, __v1
	str	__v1, [__sp, #576]
	stmia	__v1, {__a1-__a2}
	mov	__ip, #208
	add	__lr, __v5, __ip
	str	__lr, [__sp, #584]
	mov	__v1, #232
	ldmia	__lr, {__a1-__a2}
	add	__a3, __v5, __v1
	str	__a3, [__sp, #588]
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #580]
	bl	|__adddf3|
	ldr	__a4, [__sp, #580]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #588]
	ldr	__v3, [__sp, #584]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #412]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__v1, __v6, __v1
	str	__v1, [__sp, #592]
	stmia	__v1, {__a1-__a2}
	mov	__ip, #216
	add	__lr, __v5, __ip
	str	__lr, [__sp, #600]
	mov	__v1, #224
	ldmia	__lr, {__a1-__a2}
	add	__a3, __v5, __v1
	str	__a3, [__sp, #604]
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #596]
	bl	|__adddf3|
	ldr	__a4, [__sp, #596]
	stmia	__a4, {__a1-__a2}
	ldr	__v2, [__sp, #604]
	ldr	__v3, [__sp, #600]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	ldr	__ip, [__sp, #432]
	ldmia	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__v1, __v6, __v1
	str	__v1, [__sp, #608]
	stmia	__v1, {__a1-__a2}
	ldmia	__v6, {__a1-__a2}
	ldr	__v1, |L..13|
	ldr	__lr, [__sp, #416]
	ldr	__ip, [__v1, #12]
	ldmia	__lr, {__a3-__a4}
	ldmia	__ip!, {__v2-__v3}
	add	__lr, __sp, #608
	stmib	__lr, {__v2-__v3}
	ldmia	__ip, {__v1-__v2}
	add	__v3, __sp, #624
	stmda	__v3, {__v1-__v2}
	bl	|__adddf3|
	stmia	__v5, {__a1-__a2}
	ldr	__ip, [__sp, #416]
	ldmia	__v6, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __sp, #608
	ldmib	__lr, {__a3-__a4}
	bl	|__muldf3|
	ldr	__a3, [__sp, #420]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #380]
	ldr	__v1, [__sp, #396]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #384]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #380]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #400]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #428]
	ldr	__v1, [__sp, #376]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #424]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #428]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #372]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #408]
	ldr	__v1, [__sp, #392]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #404]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #408]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #388]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #436]
	ldr	__v1, [__sp, #484]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #440]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #436]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #488]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #452]
	ldr	__v1, [__sp, #468]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #456]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #452]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #472]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #496]
	ldr	__v1, [__sp, #448]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #492]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #496]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #444]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #480]
	ldr	__v1, [__sp, #464]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #476]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #480]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #460]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #500]
	ldr	__v1, [__sp, #540]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #504]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #500]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #544]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #508]
	ldr	__v1, [__sp, #524]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #512]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #508]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #528]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #552]
	ldr	__v1, [__sp, #360]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #548]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #552]
	b	|L..12|
|L..14|
	ALIGN
|L..13|
	DCD	|pnts|
|L..12|
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #356]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #536]
	ldr	__v1, [__sp, #520]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #532]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #536]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #516]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #364]
	ldr	__v1, [__sp, #596]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #368]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #364]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #600]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #564]
	ldr	__v1, [__sp, #580]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #568]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #564]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #584]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #608]
	ldr	__v1, [__sp, #560]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #604]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #608]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #608
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #556]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #592]
	ldr	__v1, [__sp, #576]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #588]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #592]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmda	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #572]
	stmia	__lr, {__a1-__a2}
	ldr	__ip, |L..16|
	mov	__a3, __v5
	ldmia	__a3!, {__a1-__a2}
	str	__a3, [__sp, #636]
	ldr	__v1, [__ip, #16]
	ldmia	__a3, {__a3-__a4}
	ldmia	__v1, {__v2-__v3}
	add	__ip, __sp, #624
	stmib	__ip, {__v2-__v3}
	bl	|__adddf3|
	stmia	__v6, {__a1-__a2}
	ldr	__lr, [__sp, #636]
	ldmia	__v5, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	bl	|__subdf3|
	add	__v1, __sp, #624
	ldmib	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__v2, __v6, #8
	str	__v2, [__sp, #640]
	stmia	__v2, {__a1-__a2}
	mov	__ip, #16
	add	__v3, __v5, __ip
	ldmia	__v3, {__a1-__a2}
	add	__v1, __v5, #24
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #644]
	bl	|__adddf3|
	ldr	__ip, [__sp, #644]
	stmia	__ip, {__a1-__a2}
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __sp, #624
	ldmib	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #24
	str	__a3, [__sp, #652]
	ldr	__v1, [__sp, #652]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v1, {__a3-__a4}
	ldr	__v2, [__sp, #644]
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v2, {__a1-__a2}
	mov	__ip, #32
	add	__v3, __v5, __ip
	ldmia	__v3, {__a1-__a2}
	add	__v1, __v5, #40
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #656]
	bl	|__adddf3|
	ldr	__ip, [__sp, #656]
	stmia	__ip, {__a1-__a2}
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __sp, #624
	ldmib	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #40
	str	__a3, [__sp, #664]
	stmia	__a3, {__a1-__a2}
	mov	__ip, #48
	add	__a4, __v5, __ip
	str	__a4, [__sp, #672]
	ldmia	__a4, {__a1-__a2}
	add	__v1, __v5, #56
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #668]
	bl	|__adddf3|
	ldr	__v2, [__sp, #668]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #672]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__lr, __v6, #56
	str	__lr, [__sp, #676]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__lr, {__a3-__a4}
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v2, {__a3-__a4}
	ldr	__v1, [__sp, #656]
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a1-__a2}
	ldr	__v2, [__sp, #664]
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v3, [__sp, #668]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #676]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	stmia	__v2, {__a1-__a2}
	mov	__ip, #64
	add	__lr, __v5, __ip
	str	__lr, [__sp, #684]
	ldmia	__lr, {__a1-__a2}
	add	__v1, __v5, #72
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #680]
	bl	|__adddf3|
	ldr	__a3, [__sp, #680]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #684]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__v1, __sp, #624
	ldmib	__v1, {__a3-__a4}
	bl	|__muldf3|
	add	__v2, __v6, #72
	str	__v2, [__sp, #688]
	stmia	__v2, {__a1-__a2}
	mov	__ip, #80
	add	__v3, __v5, __ip
	ldmia	__v3, {__a1-__a2}
	add	__v1, __v5, #88
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #692]
	bl	|__adddf3|
	ldr	__ip, [__sp, #692]
	stmia	__ip, {__a1-__a2}
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __sp, #624
	ldmib	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #88
	str	__a3, [__sp, #700]
	ldr	__v1, [__sp, #700]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v1, {__a3-__a4}
	ldr	__v2, [__sp, #692]
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v2, {__a1-__a2}
	mov	__ip, #96
	add	__v3, __v5, __ip
	ldmia	__v3, {__a1-__a2}
	add	__v1, __v5, #104
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #704]
	bl	|__adddf3|
	ldr	__ip, [__sp, #704]
	stmia	__ip, {__a1-__a2}
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__lr, __sp, #624
	ldmib	__lr, {__a3-__a4}
	bl	|__muldf3|
	add	__a3, __v6, #104
	str	__a3, [__sp, #712]
	stmia	__a3, {__a1-__a2}
	mov	__ip, #112
	add	__a4, __v5, __ip
	str	__a4, [__sp, #720]
	ldmia	__a4, {__a1-__a2}
	add	__v1, __v5, #120
	ldmia	__v1, {__a3-__a4}
	add	__ip, __v6, __ip
	b	|L..15|
|L..17|
	ALIGN
|L..16|
	DCD	|pnts|
|L..15|
	str	__ip, [__sp, #716]
	bl	|__adddf3|
	ldr	__v2, [__sp, #716]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #720]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	add	__lr, __v6, #120
	str	__lr, [__sp, #724]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__lr, {__a3-__a4}
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v2, {__a3-__a4}
	ldr	__v1, [__sp, #704]
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a1-__a2}
	ldr	__v2, [__sp, #712]
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v3, [__sp, #716]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #724]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	mov	__ip, #128
	stmia	__v2, {__a1-__a2}
	add	__v4, __v5, __ip
	mov	__v1, #136
	ldmia	__v4, {__a1-__a2}
	add	__lr, __v5, __v1
	str	__lr, [__sp, #732]
	ldmia	__lr, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #728]
	bl	|__adddf3|
	ldr	__a3, [__sp, #728]
	stmia	__a3, {__a1-__a2}
	ldr	__v2, [__sp, #732]
	ldmia	__v4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__v3, __sp, #624
	ldmib	__v3, {__a3-__a4}
	bl	|__muldf3|
	add	__v1, __v6, __v1
	stmia	__v1, {__a1-__a2}
	ldr	__ip, [__sp, #528]
	ldr	__lr, [__sp, #544]
	ldmia	__ip, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a3, [__sp, #524]
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #544]
	ldr	__v1, [__sp, #528]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__v2, __sp, #624
	ldmib	__v2, {__a3-__a4}
	bl	|__muldf3|
	ldr	__v3, [__sp, #540]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v3, {__a3-__a4}
	ldr	__ip, [__sp, #524]
	ldmia	__ip, {__a1-__a2}
	bl	|__adddf3|
	ldr	__lr, [__sp, #524]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #548]
	ldr	__v1, [__sp, #532]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #552]
	str	__v2, [__sp, #736]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #548]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #536]
	stmia	__lr, {__a1-__a2}
	mov	__v1, #176
	add	__v2, __v5, __v1
	ldmia	__v2, {__a1-__a2}
	add	__a3, __v5, #184
	str	__a3, [__sp, #740]
	ldmia	__a3, {__a3-__a4}
	add	__v1, __v6, __v1
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldr	__a4, [__sp, #740]
	ldmia	__a4, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__v2, __sp, #624
	ldmib	__v2, {__a3-__a4}
	bl	|__muldf3|
	add	__v2, __v6, #184
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v2, {__a3-__a4}
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v1, {__a3-__a4}
	ldr	__v3, [__sp, #736]
	ldmia	__v3, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #536]
	ldmia	__v1, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldr	__lr, [__sp, #536]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a3, [__sp, #536]
	stmia	__a3, {__a1-__a2}
	mov	__ip, #192
	ldr	__v2, [__sp, #568]
	add	__v1, __v5, __ip
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	add	__ip, __v6, __ip
	str	__ip, [__sp, #744]
	bl	|__adddf3|
	ldr	__v3, [__sp, #744]
	stmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #564]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #584]
	ldr	__v1, [__sp, #600]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #580]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #584]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #596]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__lr, {__a3-__a4}
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v2, {__a1-__a2}
	ldr	__a3, [__sp, #604]
	ldr	__v1, [__sp, #588]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #608]
	str	__v2, [__sp, #748]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #604]
	ldmia	__v3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #592]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #572]
	ldr	__v1, [__sp, #556]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #576]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #572]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__subdf3|
	add	__ip, __sp, #624
	ldmib	__ip, {__a3-__a4}
	bl	|__muldf3|
	ldr	__lr, [__sp, #560]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__lr, {__a3-__a4}
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v2, {__a3-__a4}
	ldr	__v1, [__sp, #748]
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a1-__a2}
	ldr	__v2, [__sp, #592]
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v3, [__sp, #576]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #560]
	ldmia	__v2, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	stmia	__v2, {__a1-__a2}
	ldr	__lr, [__sp, #0]
	ldmia	__v6, {__a2-__a3}
	add	__ip, __lr, #2048
	stmia	__ip, {__a2-__a3}
	ldr	__a4, [__sp, #656]
	mov	__v3, #1536
	ldmia	__a4, {__a3-__a4}
	add	__ip, __lr, __v3
	stmia	__ip, {__a3-__a4}
	ldr	__v2, [__sp, #644]
	mov	__v4, #1024
	ldmia	__v2, {__v1-__v2}
	add	__ip, __lr, __v4
	stmia	__ip, {__v1-__v2}
	ldr	__a4, [__sp, #640]
	ldmia	__a4, {__a4-__v1}
	add	__v2, __sp, #752
	stmia	__v2, {__a4-__v1}
	ldr	__v2, [__sp, #668]
	mov	__a3, #512
	ldmia	__v2, {__v1-__v2}
	add	__ip, __lr, __a3
	stmia	__ip, {__v1-__v2}
	add	__a4, __sp, #752
	ldmia	__a4, {__a4-__v1}
	ldr	__v2, [__sp, #4]
	stmia	__v2, {__a4-__v1}
	add	__a3, __v2, __a3
	ldr	__v2, [__sp, #664]
	ldmia	__v2, {__v1-__v2}
	stmia	__a3, {__v1-__v2}
	ldr	__a3, [__sp, #652]
	ldr	__ip, [__sp, #4]
	ldmia	__a3, {__a2-__a3}
	add	__a1, __ip, __v4
	stmia	__a1, {__a2-__a3}
	ldr	__v1, [__sp, #676]
	ldmia	__v1, {__a4-__v1}
	add	__a2, __ip, __v3
	stmia	__a2, {__a4-__v1}
	ldr	__v2, [__sp, #680]
	ldr	__v3, [__sp, #704]
	ldmia	__v2, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	add	__v1, __sp, #752
	ldmia	__v1, {__v1-__v2}
	ldr	__v3, [__sp, #0]
	stmia	__v3, {__v1-__v2}
	bl	|__adddf3|
	add	__v2, __sp, #768
	stmdb	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #680]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #704]
	ldr	__lr, [__sp, #692]
	ldr	__v1, [__sp, #0]
	mov	__v3, __v2
	ldmdb	__v3, {__v2-__v3}
	ldmia	__ip, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	add	__ip, __v1, #1792
	stmia	__ip, {__v2-__v3}
	bl	|__adddf3|
	add	__ip, __sp, #768
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #704]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #692]
	ldr	__v1, [__sp, #716]
	ldr	__v2, [__sp, #0]
	ldmia	__a3, {__a1-__a2}
	add	__ip, __v2, #1280
	ldmia	__v1, {__a3-__a4}
	add	__v2, __sp, #768
	ldmia	__v2, {__v1-__v2}
	stmia	__ip, {__v1-__v2}
	bl	|__adddf3|
	add	__v3, __sp, #784
	stmdb	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #692]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #716]
	ldr	__v2, [__sp, #0]
	ldr	__v1, [__sp, #688]
	add	__ip, __v2, #768
	ldmia	__v1, {__a3-__a4}
	mov	__v2, __v3
	ldmdb	__v2, {__v1-__v2}
	ldmia	__lr, {__a1-__a2}
	stmia	__ip, {__v1-__v2}
	bl	|__adddf3|
	add	__v3, __sp, #784
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #716]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #688]
	ldr	__v1, [__sp, #712]
	ldr	__v2, [__sp, #0]
	ldmia	__v1, {__a3-__a4}
	mov	__v1, #256
	add	__ip, __v2, __v1
	ldmia	__v3, {__v2-__v3}
	ldmia	__lr, {__a1-__a2}
	stmia	__ip, {__v2-__v3}
	bl	|__adddf3|
	ldr	__ip, [__sp, #688]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #4]
	add	__v1, __lr, __v1
	stmia	__v1, {__a1-__a2}
	ldr	__a3, [__sp, #712]
	ldr	__v1, [__sp, #700]
	ldmia	__a3, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #712]
	stmia	__v2, {__a1-__a2}
	ldr	__v3, [__sp, #4]
	add	__v3, __v3, #768
	str	__v3, [__sp, #792]
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #724]
	ldmia	__v1, {__a1-__a2}
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	stmia	__v1, {__a1-__a2}
	ldr	__lr, [__sp, #4]
	add	__lr, __lr, #1280
	str	__lr, [__sp, #796]
	stmia	__lr, {__a1-__a2}
	ldr	__a4, [__sp, #724]
	ldr	__a2, [__sp, #4]
	ldmia	__a4, {__a3-__a4}
	add	__ip, __a2, #1792
	stmia	__ip, {__a3-__a4}
	ldr	__v1, [__sp, #744]
	ldr	__v2, [__sp, #748]
	ldmia	__v1, {__a1-__a2}
	ldmia	__v2, {__a3-__a4}
	bl	|__adddf3|
	add	__v3, __sp, #800
	stmia	__v3, {__a1-__a2}
	ldr	__ip, [__sp, #744]
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #728]
	ldmia	__lr, {__a1-__a2}
	ldmia	__v3, {__a3-__a4}
	bl	|__adddf3|
	ldr	__a3, [__sp, #0]
	add	__ip, __a3, #1920
	stmia	__ip, {__a1-__a2}
	ldr	__v1, [__sp, #736]
	add	__v2, __sp, #800
	ldmia	__v2, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v3, [__sp, #0]
	add	__ip, __v3, #1664
	stmia	__ip, {__a1-__a2}
	add	__ip, __v6, #224
	str	__ip, [__sp, #808]
	ldmia	__ip, {__a1-__a2}
	add	__lr, __v6, #208
	str	__lr, [__sp, #812]
	ldmia	__lr, {__a3-__a4}
	bl	|__adddf3|
	add	__a3, __sp, #816
	stmia	__a3, {__a1-__a2}
	ldr	__a4, [__sp, #808]
	stmia	__a4, {__a1-__a2}
	ldmia	__a3, {__a3-__a4}
	add	__ip, __v6, #160
	ldmia	__ip, {__a1-__a2}
	bl	|__adddf3|
	add	__ip, __v3, #1408
	stmia	__ip, {__a1-__a2}
	add	__v2, __sp, #816
	ldmia	__v2, {__a1-__a2}
	add	__v1, __v6, #144
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v3, #1152
	stmia	__ip, {__a1-__a2}
	ldr	__v3, [__sp, #812]
	ldmia	__v3, {__a1-__a2}
	add	__ip, __v6, #240
	str	__ip, [__sp, #828]
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	add	__lr, __sp, #832
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #812]
	stmia	__a3, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	ldr	__a4, [__sp, #0]
	add	__ip, __a4, #896
	stmia	__ip, {__a1-__a2}
	add	__v2, __sp, #832
	ldmia	__v2, {__a1-__a2}
	add	__v1, __v6, #176
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v3, [__sp, #0]
	add	__ip, __v3, #640
	stmia	__ip, {__a1-__a2}
	ldr	__ip, [__sp, #828]
	ldmia	__ip, {__a1-__a2}
	add	__v3, __v6, #200
	ldmia	__v3, {__a3-__a4}
	bl	|__adddf3|
	add	__lr, __sp, #848
	stmda	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #828]
	stmia	__a3, {__a1-__a2}
	ldmda	__lr, {__a3-__a4}
	ldmia	__v1, {__a1-__a2}
	bl	|__adddf3|
	ldr	__a4, [__sp, #0]
	add	__ip, __a4, #384
	stmia	__ip, {__a1-__a2}
	add	__v1, __v6, #136
	str	__v1, [__sp, #852]
	add	__v2, __sp, #848
	ldmda	__v2, {__a1-__a2}
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__lr, [__sp, #0]
	mov	__v1, #128
	add	__ip, __lr, __v1
	stmia	__ip, {__a1-__a2}
	ldmia	__v3, {__a1-__a2}
	add	__a3, __v6, #232
	str	__a3, [__sp, #856]
	ldmia	__a3, {__a3-__a4}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v3, {__a3-__a4}
	ldr	__v2, [__sp, #852]
	ldmia	__v2, {__a1-__a2}
	bl	|__adddf3|
	ldr	__ip, [__sp, #4]
	add	__v1, __ip, __v1
	stmia	__v1, {__a1-__a2}
	ldmia	__v3, {__a1-__a2}
	add	__v4, __v6, #168
	ldmia	__v4, {__a3-__a4}
	bl	|__adddf3|
	ldr	__lr, [__sp, #4]
	add	__lr, __lr, #384
	str	__lr, [__sp, #860]
	stmia	__lr, {__a1-__a2}
	ldr	__a3, [__sp, #856]
	ldmia	__a3, {__a1-__a2}
	add	__v1, __v6, #216
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	ldr	__v2, [__sp, #856]
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v2, {__a3-__a4}
	ldmia	__v4, {__a1-__a2}
	bl	|__adddf3|
	ldr	__v3, [__sp, #4]
	add	__ip, __v3, #640
	stmia	__ip, {__a1-__a2}
	ldmia	__v2, {__a1-__a2}
	add	__v4, __v6, #152
	ldmia	__v4, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v3, #896
	stmia	__ip, {__a1-__a2}
	ldmia	__v1, {__a1-__a2}
	add	__ip, __v6, #248
	str	__ip, [__sp, #864]
	ldmia	__ip, {__a3-__a4}
	bl	|__adddf3|
	mov	__a4, __a2
	mov	__a3, __a1
	stmia	__v1, {__a3-__a4}
	ldmia	__v4, {__a1-__a2}
	bl	|__adddf3|
	add	__ip, __v3, #1152
	stmia	__ip, {__a1-__a2}
	ldmia	__v1, {__a1-__a2}
	add	__v1, __v6, #184
	ldmia	__v1, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v3, #1408
	stmia	__ip, {__a1-__a2}
	ldr	__lr, [__sp, #864]
	ldmia	__v1, {__a1-__a2}
	ldmia	__lr, {__a3-__a4}
	bl	|__adddf3|
	add	__ip, __v3, #1664
	stmia	__ip, {__a1-__a2}
	ldr	__a4, [__sp, #864]
	ldmia	__a4, {__a3-__a4}
	add	__a2, __v3, #1920
	stmia	__a2, {__a3-__a4}
	ldmea	__fp, {__v1, __v2, __v3, __v4, __v5, __v6, __fp, __sp, __pc}
	ALIGN
	EXPORT	|dct64|
|dct64|
	; args = 0, pretend = 0, frame = 516, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	sub	__ip, __sp, #516
	cmp	__ip, __sl
	bllt	|__rt_stkovf_split_big|
	sub	__sp, __sp, #516
	str	__a3, [__sp, #0]
	add	__a3, __sp, #4
	add	__a4, __sp, #260
	bl	|dct64_1|
	ldmea	__fp, {__fp, __sp, __pc}
	END
