; Generated by gcc 2.95.2 19991024 (release) for ARM/RISC OS
__r0	RN	0
__a1	RN	0
__a2	RN	1
__a3	RN	2
__a4	RN	3
__v1	RN	4
__v2	RN	5
__v3	RN	6
__v4	RN	7
__v5	RN	8
__v6	RN	9
__sl	RN	10
__fp	RN	11
__ip	RN	12
__sp	RN	13
__lr	RN	14
__pc	RN	15
__f0	FN	0
__f1	FN	1
__f2	FN	2
__f3	FN	3
__f4	FN	4
__f5	FN	5
__f6	FN	6
__f7	FN	7
	AREA |C$$code1|, CODE, READONLY
|gcc2_compiled.|
	EXPORT	|tabsel_123|
	ALIGN
|tabsel_123|
	DCD	0
	DCD	32
	DCD	64
	DCD	96
	DCD	128
	DCD	160
	DCD	192
	DCD	224
	DCD	256
	DCD	288
	DCD	320
	DCD	352
	DCD	384
	DCD	416
	DCD	448
	%	4
	DCD	0
	DCD	32
	DCD	48
	DCD	56
	DCD	64
	DCD	80
	DCD	96
	DCD	112
	DCD	128
	DCD	160
	DCD	192
	DCD	224
	DCD	256
	DCD	320
	DCD	384
	%	4
	DCD	0
	DCD	32
	DCD	40
	DCD	48
	DCD	56
	DCD	64
	DCD	80
	DCD	96
	DCD	112
	DCD	128
	DCD	160
	DCD	192
	DCD	224
	DCD	256
	DCD	320
	%	4
	DCD	0
	DCD	32
	DCD	48
	DCD	56
	DCD	64
	DCD	80
	DCD	96
	DCD	112
	DCD	128
	DCD	144
	DCD	160
	DCD	176
	DCD	192
	DCD	224
	DCD	256
	%	4
	DCD	0
	DCD	8
	DCD	16
	DCD	24
	DCD	32
	DCD	40
	DCD	48
	DCD	56
	DCD	64
	DCD	80
	DCD	96
	DCD	112
	DCD	128
	DCD	144
	DCD	160
	%	4
	DCD	0
	DCD	8
	DCD	16
	DCD	24
	DCD	32
	DCD	40
	DCD	48
	DCD	56
	DCD	64
	DCD	80
	DCD	96
	DCD	112
	DCD	128
	DCD	144
	DCD	160
	%	4
	EXPORT	|freqs|
	ALIGN
|freqs|
	DCD	44100
	DCD	48000
	DCD	32000
	DCD	22050
	DCD	24000
	DCD	16000
	DCD	11025
	DCD	12000
	DCD	8000
	EXPORT	|pcm_point|
	AREA |C$$data1|, DATA
	ALIGN
|pcm_point|
	DCD	0
	AREA |C$$code2|, CODE, READONLY
	ALIGN
	EXPORT	|head_check|
|head_check|
	; args = 0, pretend = 0, frame = 0, alloca = 0
	; frame_needed = 0, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __a1, lsr #21
	mov	__ip, __ip, asl #21
	cmn	__ip, #2097152
	mov	__ip, __a1, lsr #17
	and	__ip, __ip, #3
	rsb	__ip, __ip, #4
	beq	|L..3|
|L..11|
	mov	__a1, #0
	mov	__pc, __lr
|L..3|
	cmp	__ip, #3
	beq	|L..4|
	cmp	__ip, #4
	beq	|L..11|
|L..4|
	cmp	__a2, #0
	ble	|L..6|
	cmp	__ip, __a2
	bne	|L..11|
|L..6|
	mov	__ip, __a1, lsr #12
	and	__ip, __ip, #15
	cmp	__ip, #15
	beq	|L..8|
	mov	__a1, __a1, lsr #10
	and	__a1, __a1, #3
	subs	__a1, __a1, #3
	movne	__a1, #1
	mov	__pc, __lr
|L..8|
	mov	__a1, #0
	mov	__pc, __lr
	ALIGN
|LC..0|
	DCB &53, &74, &72, &65
	DCB &61, &6d, &20, &65
	DCB &72, &72, &6f, &72
	DCB &0a, &00
	ALIGN
|LC..1|
	DCB &53, &6f, &72, &72
	DCB &79, &2c, &20, &6c
	DCB &61, &79, &65, &72
	DCB &20, &25, &64, &20
	DCB &6e, &6f, &74, &20
	DCB &73, &75, &70, &70
	DCB &6f, &72, &74, &65
	DCB &64, &0a, &00
	ALIGN
	EXPORT	|decode_header|
|decode_header|
	; args = 0, pretend = 0, frame = 0, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__v1, __fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	cmp	__sp, __sl
	bllt	|__rt_stkovf_split_small|
	tst	__a2, #1048576
	mov	__v1, __a1
	beq	|L..13|
	mov	__ip, __a2, lsr #19
	eor	__ip, __ip, #1
	and	__ip, __ip, #1
	str	__ip, [__v1, #12]
	mov	__ip, #0
	b	|L..28|
|L..13|
	mov	__ip, #1
	str	__ip, [__v1, #12]
|L..28|
	str	__ip, [__v1, #16]
	mov	__ip, __a2, lsr #10
	and	__a3, __ip, #3
	cmp	__a3, #3
	mov	__ip, __a2, lsr #17
	and	__ip, __ip, #3
	rsb	__ip, __ip, #4
	str	__ip, [__v1, #24]
	bne	|L..15|
	ldr	__ip, |L..30|
	ldr	__a2, |L..30|+4
	ldr	__a1, [__ip, #0]
	bl	|fprintf|
	mov	__a1, #1
	bl	|exit|
|L..15|
	ldr	__ip, [__v1, #16]
	cmp	__ip, #0
	addne	__ip, __a3, #6
|L..16|
	ldreq	__ip, [__v1, #12]
	addeq	__ip, __ip, __ip, asl #1
	addeq	__ip, __a3, __ip
|L..29|
	str	__ip, [__v1, #36]
	mov	__ip, __a2, lsr #16
	and	__ip, __ip, #1
	ldr	__a3, [__v1, #16]
	eor	__ip, __ip, #1
	str	__ip, [__v1, #28]
	cmp	__a3, #0
	movne	__ip, __a2, lsr #12
	andne	__ip, __ip, #15
	strne	__ip, [__v1, #32]
|L..18|
	mov	__ip, __a2, lsr #12
	and	__a1, __ip, #15
	mov	__ip, __a2, lsr #9
	and	__ip, __ip, #1
	str	__ip, [__v1, #40]
	mov	__ip, __a2, lsr #8
	and	__ip, __ip, #1
	mov	__a3, __a2, lsr #6
	and	__a3, __a3, #3
	str	__ip, [__v1, #44]
	mov	__ip, __a2, lsr #4
	and	__ip, __ip, #3
	str	__ip, [__v1, #52]
	mov	__ip, __a2, lsr #3
	and	__ip, __ip, #1
	str	__ip, [__v1, #56]
	mov	__ip, __a2, lsr #2
	str	__a1, [__v1, #32]
	and	__ip, __ip, #1
	str	__ip, [__v1, #60]
	and	__ip, __a2, #3
	str	__a3, [__v1, #48]
	str	__ip, [__v1, #64]
	cmp	__a3, #3
	ldr	__a4, [__v1, #24]
	movne	__a3, #2
	moveq	__a3, #1
	str	__a3, [__v1, #0]
	cmp	__a4, #3
	bne	|L..25|
	cmp	__a1, #0
	streq	__a1, [__v1, #68]
	beq	|L..21|
|L..23|
	ldr	__a4, [__v1, #12]
	ldr	__a3, |L..30|+8
	ldr	__a2, |L..30|+12
	add	__ip, __a4, __a4, asl #1
	mov	__ip, __ip, asl #6
	orr	__ip, __ip, __a1, asl #2
	ldr	__ip, [__a3, __ip]
	ldr	__a3, [__v1, #36]
	add	__ip, __ip, __ip, asl #2
	rsb	__ip, __ip, __ip, asl #4
	rsb	__ip, __ip, __ip, asl #4
	mov	__ip, __ip, asl #7
	ldr	__a2, [__a2, __a3, asl #2]
	mov	__a1, __ip
	str	__ip, [__v1, #68]
	mov	__a2, __a2, asl __a4
	bl	|__divsi3|
	ldr	__ip, [__v1, #40]
	add	__a1, __a1, __ip
	sub	__a1, __a1, #4
	str	__a1, [__v1, #68]
	b	|L..21|
|L..25|
	ldr	__ip, |L..30|
	ldr	__a2, |L..30|+16
	ldr	__a1, [__ip, #0]
	mov	__a3, __a4
	bl	|fprintf|
	mov	__a1, #0
	ldmea	__fp, {__v1, __fp, __sp, __pc}
|L..21|
	mov	__a1, #1
	ldmea	__fp, {__v1, __fp, __sp, __pc}
|L..31|
	ALIGN
|L..30|
	DCD	|__stderr|
	DCD	|LC..0|
	DCD	|tabsel_123|+128
	DCD	|freqs|
	DCD	|LC..1|
	AREA |C$$data2|, DATA
	ALIGN
|modes.9|
	KEEP |modes.9|
	DCD	|LC..2|
	DCD	|LC..3|
	DCD	|LC..4|
	DCD	|LC..5|
	AREA |C$$code3|, CODE, READONLY
	ALIGN
|LC..5|
	DCB &53, &69, &6e, &67
	DCB &6c, &65, &2d, &43
	DCB &68, &61, &6e, &6e
	DCB &65, &6c, &00
	ALIGN
|LC..4|
	DCB &44, &75, &61, &6c
	DCB &2d, &43, &68, &61
	DCB &6e, &6e, &65, &6c
	DCB &00
	ALIGN
|LC..3|
	DCB &4a, &6f, &69, &6e
	DCB &74, &2d, &53, &74
	DCB &65, &72, &65, &6f
	DCB &00
	ALIGN
|LC..2|
	DCB &53, &74, &65, &72
	DCB &65, &6f, &00
	AREA |C$$data3|, DATA
	ALIGN
|layers.10|
	KEEP |layers.10|
	DCD	|LC..6|
	DCD	|LC..7|
	DCD	|LC..8|
	DCD	|LC..9|
	AREA |C$$code4|, CODE, READONLY
	ALIGN
|LC..9|
	DCB &49, &49, &49, &00
	ALIGN
|LC..8|
	DCB &49, &49, &00
	ALIGN
|LC..7|
	DCB &49, &00
	ALIGN
|LC..6|
	DCB &55, &6e, &6b, &6e
	DCB &6f, &77, &6e, &00
	ALIGN
|LC..10|
	DCB &4d, &50, &45, &47
	DCB &20, &25, &73, &2c
	DCB &20, &4c, &61, &79
	DCB &65, &72, &3a, &20
	DCB &25, &73, &2c, &20
	DCB &46, &72, &65, &71
	DCB &3a, &20, &25, &6c
	DCB &64, &2c, &20, &6d
	DCB &6f, &64, &65, &3a
	DCB &20, &25, &73, &2c
	DCB &20, &6d, &6f, &64
	DCB &65, &78, &74, &3a
	DCB &20, &25, &64, &2c
	DCB &20, &42, &50, &46
	DCB &20, &3a, &20, &25
	DCB &64, &0a, &00
	ALIGN
|LC..11|
	DCB &32, &2e, &30, &00
	ALIGN
|LC..12|
	DCB &31, &2e, &30, &00
	ALIGN
|LC..13|
	DCB &32, &2e, &35, &00
	ALIGN
|LC..14|
	DCB &43, &68, &61, &6e
	DCB &6e, &65, &6c, &73
	DCB &3a, &20, &25, &64
	DCB &2c, &20, &63, &6f
	DCB &70, &79, &72, &69
	DCB &67, &68, &74, &3a
	DCB &20, &25, &73, &2c
	DCB &20, &6f, &72, &69
	DCB &67, &69, &6e, &61
	DCB &6c, &3a, &20, &25
	DCB &73, &2c, &20, &43
	DCB &52, &43, &3a, &20
	DCB &25, &73, &2c, &20
	DCB &65, &6d, &70, &68
	DCB &61, &73, &69, &73
	DCB &3a, &20, &25, &64
	DCB &2e, &0a, &00
	ALIGN
|LC..15|
	DCB &59, &65, &73, &00
	ALIGN
|LC..16|
	DCB &4e, &6f, &00
	ALIGN
|LC..17|
	DCB &42, &69, &74, &72
	DCB &61, &74, &65, &3a
	DCB &20, &25, &64, &20
	DCB &4b, &62, &69, &74
	DCB &73, &2f, &73, &2c
	DCB &20, &45, &78, &74
	DCB &65, &6e, &73, &69
	DCB &6f, &6e, &20, &76
	DCB &61, &6c, &75, &65
	DCB &3a, &20, &25, &64
	DCB &0a, &00
	ALIGN
	EXPORT	|print_header|
|print_header|
	; args = 0, pretend = 0, frame = 16, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__v1, __v2, __v3, __fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	cmp	__sp, __sl
	bllt	|__rt_stkovf_split_small|
	sub	__sp, __sp, #16
	mov	__v2, __a1
	ldr	__ip, [__v2, #16]
	ldr	__v3, |L..43|
	cmp	__ip, #0
	ldr	__a1, [__v3, #0]
	bne	|L..33|
	ldr	__v1, |L..43|+4
	ldr	__a3, [__v2, #12]
	ldr	__ip, |L..43|+8
	cmp	__a3, #0
	movne	__v1, __ip
	b	|L..34|
|L..33|
	ldr	__v1, |L..43|+12
|L..34|
	ldr	__a3, [__v2, #52]
	ldr	__ip, [__v2, #68]
	ldr	__lr, |L..43|+16
	ldr	__a2, |L..43|+20
	str	__a3, [__sp, #8]
	add	__ip, __ip, #4
	str	__ip, [__sp, #12]
	ldr	__a3, |L..43|+24
	ldr	__ip, [__v2, #36]
	ldr	__ip, [__a3, __ip, asl #2]
	ldr	__a3, |L..43|+28
	str	__ip, [__sp, #0]
	ldr	__ip, [__v2, #24]
	ldr	__a4, [__a3, __ip, asl #2]
	ldr	__ip, [__v2, #48]
	ldr	__ip, [__lr, __ip, asl #2]
	mov	__a3, __v1
	str	__ip, [__sp, #4]
	bl	|fprintf|
	ldr	__a4, |L..43|+32
	ldr	__a2, |L..43|+36
	ldr	__v1, |L..43|+40
	ldr	__ip, [__v2, #60]
	ldr	__a3, [__v2, #28]
	ldr	__a1, [__v3, #0]
	cmp	__ip, #0
	movne	__ip, __v1
	moveq	__ip, __a4
	cmp	__a3, #0
	str	__ip, [__sp, #0]
	movne	__a3, __v1
	moveq	__a3, __a4
	str	__a3, [__sp, #4]
	ldr	__a3, [__v2, #0]
	ldr	__lr, [__v2, #56]
	ldr	__ip, [__v2, #64]
	cmp	__lr, #0
	movne	__a4, __v1
	str	__ip, [__sp, #8]
	bl	|fprintf|
	ldr	__a1, [__v3, #0]
	ldr	__a2, |L..43|+44
	ldr	__ip, [__v2, #24]
	ldr	__a4, [__v2, #44]
	ldr	__lr, [__v2, #32]
	ldr	__a3, [__v2, #12]
	sub	__ip, __ip, #1
	mov	__ip, __ip, asl #6
	add	__ip, __ip, __lr, asl #2
	add	__a3, __a3, __a3, asl #1
	ldr	__lr, |L..43|+48
	add	__ip, __ip, __a3, asl #6
	ldr	__a3, [__lr, __ip]
	bl	|fprintf|
	ldmea	__fp, {__v1, __v2, __v3, __fp, __sp, __pc}
|L..44|
	ALIGN
|L..43|
	DCD	|__stderr|
	DCD	|LC..12|
	DCD	|LC..11|
	DCD	|LC..13|
	DCD	|modes.9|
	DCD	|LC..10|
	DCD	|freqs|
	DCD	|layers.10|
	DCD	|LC..16|
	DCD	|LC..14|
	DCD	|LC..15|
	DCD	|LC..17|
	DCD	|tabsel_123|
	AREA |C$$data4|, DATA
	ALIGN
|modes.14|
	KEEP |modes.14|
	DCD	|LC..18|
	DCD	|LC..19|
	DCD	|LC..20|
	DCD	|LC..21|
	AREA |C$$code5|, CODE, READONLY
	ALIGN
|LC..21|
	DCB &6d, &6f, &6e, &6f
	DCB &00
	ALIGN
|LC..20|
	DCB &64, &75, &61, &6c
	DCB &2d, &63, &68, &61
	DCB &6e, &6e, &65, &6c
	DCB &00
	ALIGN
|LC..19|
	DCB &6a, &6f, &69, &6e
	DCB &74, &2d, &73, &74
	DCB &65, &72, &65, &6f
	DCB &00
	ALIGN
|LC..18|
	DCB &73, &74, &65, &72
	DCB &65, &6f, &00
	AREA |C$$data5|, DATA
	ALIGN
|layers.15|
	KEEP |layers.15|
	DCD	|LC..6|
	DCD	|LC..7|
	DCD	|LC..8|
	DCD	|LC..9|
	AREA |C$$code6|, CODE, READONLY
	ALIGN
|LC..22|
	DCB &4d, &50, &45, &47
	DCB &20, &25, &73, &20
	DCB &6c, &61, &79, &65
	DCB &72, &20, &25, &73
	DCB &2c, &20, &25, &64
	DCB &20, &6b, &62, &69
	DCB &74, &2f, &73, &2c
	DCB &20, &25, &6c, &64
	DCB &20, &48, &7a, &20
	DCB &25, &73, &0a, &00
	ALIGN
	EXPORT	|print_header_compact|
|print_header_compact|
	; args = 0, pretend = 0, frame = 12, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__v1, __fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	cmp	__sp, __sl
	bllt	|__rt_stkovf_split_small|
	sub	__sp, __sp, #12
	ldr	__ip, [__a1, #16]
	ldr	__a3, |L..50|
	cmp	__ip, #0
	ldr	__a2, [__a3, #0]
	bne	|L..46|
	ldr	__v1, |L..50|+4
	ldr	__a3, [__a1, #12]
	ldr	__ip, |L..50|+8
	cmp	__a3, #0
	movne	__v1, __ip
	b	|L..47|
|L..46|
	ldr	__v1, |L..50|+12
|L..47|
	ldr	__lr, [__a1, #24]
	ldr	__a4, [__a1, #32]
	ldr	__a3, [__a1, #12]
	sub	__ip, __lr, #1
	mov	__ip, __ip, asl #6
	add	__ip, __ip, __a4, asl #2
	add	__a3, __a3, __a3, asl #1
	ldr	__a4, |L..50|+16
	add	__ip, __ip, __a3, asl #6
	ldr	__a3, |L..50|+20
	ldr	__ip, [__a4, __ip]
	str	__ip, [__sp, #0]
	ldr	__ip, [__a1, #36]
	ldr	__ip, [__a3, __ip, asl #2]
	ldr	__a3, |L..50|+24
	str	__ip, [__sp, #4]
	ldr	__ip, [__a1, #48]
	mov	__a1, __a2
	ldr	__a2, |L..50|+28
	ldr	__ip, [__a3, __ip, asl #2]
	str	__ip, [__sp, #8]
	ldr	__ip, |L..50|+32
	ldr	__a4, [__ip, __lr, asl #2]
	mov	__a3, __v1
	bl	|fprintf|
	ldmea	__fp, {__v1, __fp, __sp, __pc}
|L..51|
	ALIGN
|L..50|
	DCD	|__stderr|
	DCD	|LC..12|
	DCD	|LC..11|
	DCD	|LC..13|
	DCD	|tabsel_123|
	DCD	|freqs|
	DCD	|modes.14|
	DCD	|LC..22|
	DCD	|layers.15|
	ALIGN
	EXPORT	|getbits|
|getbits|
	; args = 0, pretend = 0, frame = 0, alloca = 0
	; frame_needed = 0, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	stmfd	__sp!, {__v1, __v2, __v3, __lr}
	subs	__v3, __a1, #0
	beq	|L..53|
	ldr	__a2, |L..55|
	ldr	__a4, |L..55|+4
	ldr	__a3, [__a2, #0]
	ldr	__v1, [__a4, #0]
	ldrb	__a1, [__a3, #0]	; zero_extendqisi2
	ldrb	__v2, [__a3, #1]	; zero_extendqisi2
	add	__ip, __v1, __v3
	ldrb	__lr, [__a3, #2]	; zero_extendqisi2
	add	__a3, __a3, __ip, asr #3
	str	__a3, [__a2, #0]
	and	__ip, __ip, #7
	str	__ip, [__a4, #0]
	rsb	__ip, __v3, #24
	orr	__a1, __v2, __a1, asl #8
	orr	__a1, __lr, __a1, asl #8
	mov	__a1, __a1, asl __v1
	bic	__a1, __a1, #-16777216
	mov	__a1, __a1, lsr __ip
	ldmfd	__sp!, {__v1, __v2, __v3, __pc}
|L..53|
	mov	__a1, __v3
	ldmfd	__sp!, {__v1, __v2, __v3, __pc}
|L..56|
	ALIGN
|L..55|
	DCD	|wordpointer|
	DCD	|bitindex|
	ALIGN
	EXPORT	|getbits_fast|
|getbits_fast|
	; args = 0, pretend = 0, frame = 0, alloca = 0
	; frame_needed = 0, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	stmfd	__sp!, {__v1, __v2, __lr}
	ldr	__lr, |L..58|
	ldr	__a2, |L..58|+4
	ldr	__a3, [__lr, #0]
	ldr	__v2, [__a2, #0]
	ldrb	__a4, [__a3, #0]	; zero_extendqisi2
	add	__ip, __v2, __a1
	ldrb	__v1, [__a3, #1]	; zero_extendqisi2
	add	__a3, __a3, __ip, asr #3
	str	__a3, [__lr, #0]
	and	__ip, __ip, #7
	str	__ip, [__a2, #0]
	rsb	__a1, __a1, #16
	ldr	__ip, |L..58|+8
	orr	__a4, __v1, __a4, asl #8
	and	__a4, __ip, __a4, asl __v2
	mov	__a1, __a4, lsr __a1
	ldmfd	__sp!, {__v1, __v2, __pc}
|L..59|
	ALIGN
|L..58|
	DCD	|wordpointer|
	DCD	|bitindex|
	DCD	65535
	ALIGN
|LC..23|
	DCB &43, &61, &6e, &27
	DCB &74, &20, &73, &74
	DCB &65, &70, &20, &62
	DCB &61, &63, &6b, &20
	DCB &25, &6c, &64, &21
	DCB &0a, &00
	ALIGN
	EXPORT	|set_pointer|
|set_pointer|
	; args = 0, pretend = 0, frame = 0, alloca = 0
	; frame_needed = 1, anonymous_args = 0
	; nonlocal_label = 0, nonlocal_goto = 0
	mov	__ip, __sp
	stmfd	__sp!, {__v1, __v2, __fp, __ip, __lr, __pc}
	sub	__fp, __ip, #4
	cmp	__sp, __sl
	bllt	|__rt_stkovf_split_small|
	mov	__lr, __a2
	ldr	__v2, [__a1, #52]
	cmp	__lr, #0
	movle	__v1, #0
	movgt	__v1, __v2, lsr #31
	cmp	__v1, #0
	beq	|L..61|
	ldr	__ip, |L..64|
	ldr	__a2, |L..64|+4
	ldr	__a1, [__ip, #0]
	mov	__a3, __lr
	bl	|fprintf|
	mvn	__a1, #0
	ldmea	__fp, {__v1, __v2, __fp, __sp, __pc}
|L..61|
	ldr	__a4, |L..64|+8
	ldr	__ip, |L..64|+12
	ldr	__a3, [__a4, #0]
	cmp	__lr, #0
	ldr	__ip, [__a1, __ip]
	rsb	__a3, __lr, __a3
	rsb	__ip, __ip, #1
	add	__ip, __ip, __ip, asl #3
	mov	__ip, __ip, asl #8
	add	__ip, __ip, #148
	add	__ip, __a1, __ip
	add	__a2, __ip, #512
	str	__a3, [__a4, #0]
	beq	|L..62|
	mov	__a1, __a3
	add	__a2, __a2, __v2
	rsb	__a2, __lr, __a2
	mov	__a3, __lr
	bl	|memcpy|
|L..62|
	ldr	__ip, |L..64|+16
	mov	__a1, __v1
	str	__v1, [__ip, #0]
	ldmea	__fp, {__v1, __v2, __fp, __sp, __pc}
|L..65|
	ALIGN
|L..64|
	DCD	|__stderr|
	DCD	|LC..23|
	DCD	|wordpointer|
	DCD	23200
	DCD	|bitindex|
	AREA |Common$$wordpointer|, DATA, COMMON
|wordpointer|
	% 4	; size=4
	EXPORT	|wordpointer|
	AREA |Common$$bitindex|, DATA, COMMON
|bitindex|
	% 4	; size=4
	EXPORT	|bitindex|
	AREA |Common$$muls|, DATA, COMMON
|muls|
	% 13824	; size=13824
	EXPORT	|muls|
	AREA |Common$$pcm_sample|, DATA, COMMON
|pcm_sample|
	% 4	; size=4
	EXPORT	|pcm_sample|
	END
