		TTL	> Regs

;************************************************************************
; Register names
;************************************************************************

r0	RN	0
r1	RN	1
r2	RN	2
r3	RN	3
r4	RN	4
r5	RN	5
r6	RN	6
r7	RN	7
r8	RN	8
r9	RN	9
r10	RN	10
r11	RN	11
r12	RN	12
r13	RN	13
r14	RN	14
r15	RN	15

r13_usr	RN	13
r14_usr	RN	14

r10_fiq	RN	10
r11_fiq	RN	11
r12_fiq	RN	12
r13_fiq	RN	13
r14_fiq	RN	14

r13_irq	RN	13
r14_irq	RN	14

r13_svc	RN	13
r14_svc	RN	14

wp	RN	r12

sp	RN	r13
sp_irq	RN	r13_irq
sp_svc	RN	r13_svc

lr	RN	r14
lr_usr	RN	r14_usr
lr_fiq	RN	r14_fiq
lr_irq	RN	r14_irq
lr_svc	RN	r14_svc

pc	RN	r15


R0	RN	0
R1	RN	1
R2	RN	2
R3	RN	3
R4	RN	4
R5	RN	5
R6	RN	6
R7	RN	7
R8	RN	8
R9	RN	9
R10	RN	10
R11	RN	11
R12	RN	12
R13	RN	13
R14	RN	14
R15	RN	15

WP	RN	12
SP	RN	13
LR	RN	14
PC	RN	15

;For C

a1	RN	0
a2	RN	1
a3	RN	2
a4	RN	3
v1	RN	4
v2	RN	5
v3	RN	6
v4	RN	7
v5	RN	8
v6	RN	9
sl	RN	10
fp	RN	11
ip	RN	12
;sp	RN	13
;lr	RN	14
;pc	RN	15

f0	FN	0
f1	FN	1
f2	FN	2
f3	FN	3
f4	FN	4
f5	FN	5
f6	FN	6
f7	FN	7


;************************************************************************
; Flag states
;************************************************************************

N_bit		EQU	1 << 31
Z_bit		EQU	1 << 30
C_bit		EQU	1 << 29
V_bit		EQU	1 << 28
I_bit		EQU	1 << 27
F_bit		EQU	1 << 26

XOS_bit		EQU	1 << 17

;************************************************************************
; Processor modes
;************************************************************************

USR_mode	EQU	0
FIQ_mode	EQU	1
IRQ_mode	EQU	2
SVC_mode	EQU	3

;************************************************************************
;Here are some macros for setting the flags in certain ways
;************************************************************************

;C=1 V=0 Z=0 N=0
	MACRO
$label	SetC
$label	CMP	PC,#0
	MEND


;C=0 V=0 Z=0 N=0
	MACRO
$label	ClearFlags
$label	CMN	PC,#0
	MEND

	MACRO
$label	ClearV
$label	ClearFlags
	MEND

	MACRO
$label	ClearC
$label	ClearFlags
	MEND

	MACRO
$label	ClearN
$label	ClearFlags
	MEND

;C=0 V=1 Z=0 N=1
	MACRO
$label	SetV
$label	CMP	PC,#&80000000
	MEND

;C=0 V=0 Z=0 N=1
	MACRO
$label	SetN
$label	CMN	PC,#&80000000
	MEND

;C=* V=* Z=1 N=0
	MACRO
$label	SetZ
$label	TST	PC,#0
	MEND

;C=* V=* Z=0 N=0
	MACRO
$label	ClearZ
$label	TEQ	PC,#0
	MEND

;************************************************************************
	END
