Using the Arm3 support application.

On the Arm3 support disk is the application !Arm3.  In order to get the 
advantage of the Arm3 it is necesarry to run this application.  The
application can either be run from the command line by type :0.!Arm3 while
the support disk is in drive 0 or by starting the desktop, opening a viewer
onto the support disk and clicking the Aleph One logo.  Alternitavly you can
copy the application onto your hard disk and make your boot file run the
application - this is by far the best as once you have done it the Arm3
support software will be loaded when ever you start the machine.

If you have run the !Arm3 application and then entered the desktop (or run
the application from the desktop) an icon will appear on the right hand side
of the icon bar with the legend Arm3.  The icon will be a turtle if the Arm3
cache is switched off and a hare if the cache is switched on.  Clicking on
the icon will switch the cache on or off.

The Arm3Support module loaded by the !Arm3 application provides the command
*Cache to allow the user to controle the cache from the command line. 
*Cache On or *Cache Off switch the cache on or off - *Cache on its own tells
the user what state the cache is in.

The module provides 5 SWIs so that programmers can controle the cache from
inside there own code.  All the SWIs bar Cache_Flush take two parameters,
the current value of what the cache sets is logically ANDed with R1 and
the EORed with R0.  Thus to simply set the parameter put a new value in
R0 and set R1 to 0.  To read the old value put 0 in R0 and -1 (&FFFFFFFF)
in R1.  All these SWIs return the new state in R0.  SWI Cache_Controle only
looks at bit 0 of the registers. If the parameter is 0 the cache gets
switched off and if it is 1 the cache is switched on.

The next 3 SWIs provided access the internal registers of the Arm3.  The
SWIs Cache_Cacheable, Cache_Updateable and Cache_Disruptive determin how the
cache behaves during accesses to various parts of memory.  If memory is
marked as cacheable then reads from these locations are cached (IO space is
not cached as it can change without the processor doing anything).  If
memory is marked as updateable then writes to to these locations update the
value for that location in the cache if the data has been cached (clearly
this does not want to be the case for read only memory).  If memory is
marked as disruptive then any writes to that memory will cause the contents
of the cahe to be discarded.  This is needed so that when the operating
system write to the memory controler to remap the RAM pages the cache is
flushed of any invalid data.  

It is important to note that misuse of these SWIs can have bad side effects
including the machine crashing or just running very slowly.  These SWIs
should only be used by experianced programmers who need to tune the cache to
fit a specific application.

For each of these three calls R0 contains a data word in which each bit
represents a 2MByte chunk of the memory map.  Bit 0 represents the memory
from &0 to &1FFFFF, bit 31 represents the chunk from &3E00000 to &3FFFFFF.
A set bit means the chunk is cacheable / updateable / disruptive, a clear
bit means that it is not.  The initial settings for these registers are
carefully chosen, do not change them without good cause and knowledge of
what you are doing.

The final SWI is Cache_Flush which simply removes all cached information
from the cache.  The SWI takes no parameters.
 